Measure and suppress soft errors in memory devices
soft errors are "interference" (i.e., data loss) that cannot be intentionally regenerated in semiconductor devices. It is caused by external factors that are not controlled by the designer, including α Particles, cosmic rays and thermal neutrons. Many systems can tolerate a certain degree of soft error. For example, if a pre compression capture buffer or a post decompression playback buffer is designed for an audio, video, or still imaging system, an accidental defective bit may not be detected and may not be important to the user. However, when the storage element is responsible for controlling the function of the system in mission critical applications, the adverse effect of soft error will be much more serious, which will not only damage the data, but also lead to function loss and key system failure. This paper will discuss the root causes of these soft errors, different measurement techniques and methods to resist these soft errors
the problem of soft error rate (SER) was widely concerned as a memory data subject in the late 1970s, when DRAM began to show signs of random failure. With the continuous reduction of the geometric size of the process, the reduction rate of the critical charge required to cause misalignment is much faster than that of the charge accumulation region in the storage unit. This means that when using smaller process geometric dimensions such as 90nm, soft error is a more noteworthy problem, and further measures need to be taken to ensure that the soft error rate is maintained at an acceptable level
ser tendency and implication
the compression of process size has been the main tool to realize the survival of the industry, and plays an important role in increasing density, improving performance and reducing cost. With the device processing technology, the signal width of deep submicron gate (0.25mm → 90nm?) Striding forward, the unit size of memory products continues to shrink, resulting in lower and lower voltage (5V → 3.3V → 1.8V...) and smaller internal capacitance of storage units (10ff → 5ff...). Due to the reduction of capacitance, the critical charge in the memory device (the minimum charge required for a storage unit to store data) continues to shrink, which makes them call this the "best" in their life for him; Floating paradise rdquo; Ser's natural resistance, but there is no way to guarantee the quality of equipment, and its ability to decline. This in turn means that a particles or cosmic rays with much lower energy may interfere with the storage unit
system level meaning and importance
soft error is measured by fit. The fit rate is just the number of failures in a billion device operating hours. 1000 fit corresponds to an MTTF (mean time between failures) of about 144 years. In order to understand the importance of soft errors, we might as well take a look at some examples of their potential impact on 13 storage applications of major projects under construction in a typical base. For example, a cell with a 4Mbit low-power memory with a soft error rate of 1000 fit/mbit is likely to have a soft error every 28 years. A standard high-end router with 100gbits synchronous SRAM with a soft error rate of 600 fit/mbit may have errors every 17 hours. In addition, the reason why soft error is important is that its fit rate is more than 10 times that of the typical fit rate of hard reliability failure. Obviously, the soft error is not a big problem for the cell, but those systems that use a large amount of memory may be seriously affected
ser root cause
now, you have a general concept of soft error. Now, let's briefly discuss the mechanism of these different root causes of soft error one by one
α Influence of particles
the molding compound used in semiconductor device packaging may contain impurities such as th232 and u238, which tend to decay over time. These impurities will release energy in the range of 2~9mev (million electron volts) α Particles. In silicon, the energy required to form electron hole pairs is 3.6eV. Which means α The particles may generate about 106 electron hole pairs. The electric field in the depletion region will cause charge drift, which will make the transistor withstand current disturbance. If the charge transfer amount exceeds the critical charge amount (qcrit) stored in the storage unit in the state of 0 or 1, the stored data will be flipped
the influence of cosmic rays
high-energy cosmic rays and solar particles will react with the upper atmosphere. When this happens, high-energy protons and neutrons will be produced. Neutrons are particularly difficult to deal with because they can penetrate most man-made structures (for example, neutrons can easily penetrate 5 feet of concrete). The intensity of this effect will vary with the latitude and altitude. In London, the impact is 1.2 times more serious than in the equatorial region. In Denver, because of its high altitude, the impact is three times stronger than that of San Francisco, which is located at sea level. On the plane, the impact will be 100~800 times that on the ground
the energy range of high-energy neutrons is 10~800mev. Household appliances are the largest consumer area of MDI in China. Moreover, because they are not charged, their reaction with silicon materials is different from α Particles. In fact, neutrons must bombard silicon nuclei to cause soft errors. This kind of collision may occur α Particles and other ions with heavier mass, thus generating electron hole pairs, but this electron hole has more energy than the typical ones from molded compounds α Particles have high energy
influence of thermal neutrons
thermal neutrons may be a major source of soft faults, and their energy is generally very low (about 25MeV). These low-energy neutrons are easily captured by B10 isotopes, which are abundant in the dielectric layer of BPSG (borophosphosilicate glass). The capture of neutrons will lead to a fission of lithium, a α Particles and one
LINK
Copyright © 2011 JIN SHI